FDD13AN06A0【PDF 9/12 页】MOSFET N-CH 60V 50A D-PAK

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SABER Electrical Model

sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-5,voff=-2)

sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-1.5,voff=.5)

c.ca n12 n8 = 5.1e-10 51

c.cb n15 n14 = 5.8e-10

c.cin n6 n8 = 1.3e-9

rev August2002

template FDD13AN06A0 n2,n1,n3

electrical n2,n1,n3

{

var i iscl

dp..model dbodymod = (isl=1.0e-11,nl=1.08,rs=3.5e-3,trs1=2.2e-3,trs2=2.5e-9,cjo=.9e-9,m=5.1e-1,tt=1e-9,xti=3.9)

dp..model dbreakmod = (rs=1.5e-1,trs1=1e-3,trs2=-8.9e-6)

dp..model dplcapmod = (cjo=4.1e-10,isl=10e-30,nl=10,m=0.45)

m..model mmedmod = (type=_n,vto=3.5,kp=6,is=1e-30, tox=1)

m..model mstrongmod = (type=_n,vto=4.3,kp=50,is=1e-30, tox=1)

m..model mweakmod = (type=_n,vto=2.91,kp=0.05,is=1e-30, tox=1,rs=0.1)

DPLCAP 5

sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-2,voff=-5)

10

sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=.5,voff=-1.5) RSLC1

RSLC2

ISCL

LDRAIN

RLDRAIN

DRAIN

2

dp.dbreak n5 n11 = model=dbreakmod

ESG

dp.dplcap n10 n5 = model=dplcapmod

+

+ 19 -

spe.ebreak n11 n7 n17 n18 = 65.40

RGATE + 18 -

6

spe.eds n14 n8 n5 n8 = 1

22

9

spe.esg n6 n10 n6 n8 = 1

15

14

13

l.lgate n1 n9 = 5.2e-9

l.ldrain n2 n5 = 1.0e-9

l.lsource n3 n7 = 2.14e-9

CA

res.rldrain n2 n5 = 10 6

8

res.rlsource n3 n7 = 21.4

50

11

21

MMED

+

8

LGATE EVTEMP 8

GATE

1

spe.egs n13 n8 n6 n8 = 1 20

RLGATE

spe.evthres n6 n21 n19 n8 = 1 CIN

spe.evtemp n20 n6 n18 n22 = 1

i.it n8 n17 = 1

1 2

res.rlgate n1 n9 = 52 + +

m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u

m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u

dp.dbody n7 n5 = model=dbodymod -

6

8

S1A S2A

8 13

S1B S2B

13 CB

EGS EDS

EVTHRES

- -

5

8

RDRAIN

16

MSTRO 17

DBREAK

MWEAK

EBREAK

18

-

7

RSOURCE

RBREAK

17

14 IT

8

RVTHRES

DBODY

LSOURCE

RLSOURCE

18

RVTEMP

19

-

VBAT

+

22

SOURCE

3

res.rbreak n17 n18 = 1, tc1=9e-4,tc2=-5e-7

res.rdrain n50 n16 = 3.1e-3, tc1=1.3e-2,tc2=5.2e-5

res.rgate n9 n20 = 3.71

res.rslc1 n5 n51 = 1e-6, tc1=1.8e-3,tc2=1.7e-5

res.rslc2 n5 n50 = 1e3

res.rsource n8 n7 = 5.5e-3, tc1=1e-3,tc2=1e-6

res.rvthres n22 n8 = 1, tc1=-5.3e-3,tc2=-1.0e-5

res.rvtemp n18 n19 = 1, tc1=-2.5e-3,tc2=1e-6

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc=1

equations {

i (n51->n50) +=iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/160))** 6))

}}

?2003 Fairchild Semiconductor Corporation

FDD13AN06A0 Rev. C2

9

www.fairchildsemi.com

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